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A microelectrode/microelectronic hybrid device for brain implantable neuroprosthesis applications

机译:用于脑植入式神经假体的微电极/微电子混合装置

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We have designed, fabricated, and characterized a microminiaturized "neuroport" for brain implantable neuroprosthesis applications, using an analog CMOS integrated circuit and a silicon based microelectrode array. An ultra-low power, low-noise CMOS preamplifier array with integral multiplexing was designed to accommodate stringent thermal and electrophysiological requirements for implantation in the brain, and a hybrid integration approach was developed to fabricate a functional microminiaturized neuroprobe device. Measurements showed that our fully scalable 16-channel CMOS amplifier chip had an average gain of 44 dB, bandwidth from 10 Hz to 7.3 kHz, and an equivalent input noise of approximately 9 μVrms with an average power consumption per preamplifier of 52 μW, which is consistent with simulation results. As a proof-of-concept demonstration, we have measured local field potentials from thalamocortical brain slices of rats, showing oscillatory behavior with an amplitude about 0.5 mV and a period ranging 80-120 ms. The results suggest that the hybrid integrated neuroport can form a prime platform for the development of a next level microminiaturized neural interface to the brain in a single implantable unit.
机译:我们使用模拟CMOS集成电路和基于硅的微电极阵列,设计,制造并表征了用于大脑植入的神经假体应用的微型化“神经端口”。设计了具有集成复用功能的超低功耗,低噪声CMOS前置放大器阵列,以适应植入大脑的严格的热和电生理要求,并开发了一种混合集成方法来制造功能超小型化的神经探针设备。测量表明,我们的可完全扩展的16通道CMOS放大器芯片具有44 dB的平均增益,从10 Hz到7.3 kHz的带宽以及大约9μVrms的等效输入噪声,每个前置放大器的平均功耗为52μW,这是与仿真结果一致。作为概念验证的证明,我们已经测量了大鼠丘脑皮质切片的局部场电势,显示了振幅约为0.5 mV且周期为80-120 ms的振荡行为。结果表明,混合集成神经端口可以形成一个主要平台,用于在单个可植入单元中开发到大脑的下一级微型神经网络。

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