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Analysis of the barrier in vertically-stacked interface-treated Josephson junctions

机译:垂直堆叠的界面处理约瑟夫森结的势垒分析

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The authors have investigated the structure and the composition of the barrier in YBCO vertically-stacked-type interface-treated Josephson junctions by TEM and TEM-EDS. The barrier was formed by the Ar ion milling of the base YBCO electrode surface and the subsequent annealing. For a sample treated with accelerating voltage (V/sub acc/) of 1300 V, we observed Y/sub 2/O/sub 3/ phases in the barrier. In contrast, for a sample with V/sub acc/=700 V, we could observe few Y/sub 2/O/sub 3/ phases. Our TEM observation suggested that junctions with higher J/sub c/ fabricated with lower V/sub acc/ would have thinner and more uniform barriers. In addition, the composition of the barrier was Y-rich and Cu-poor, and such deviation decreased with decreasing V/sub acc/. These tendencies well correspond to the results for ramp-edge-type junctions reported so far.
机译:作者已经通过TEM和TEM-EDS研究了YBCO垂直堆叠型界面处理的Josephson结中势垒的结构和组成。该阻挡层是通过基部YBCO电极表面的Ar离子铣削和随后的退火而形成的。对于用1300 V的加速电压(V / sub acc /)处理的样品,我们在势垒中观察到Y / sub 2 / O / sub 3 /相。相反,对于V / sub acc / = 700 V的样本,我们可以观察到很少的Y / sub 2 / O / sub 3 /相。我们的TEM观察表明,以较低的V / sub acc /制造的具有较高J / sub c /的结将具有更薄且更均匀的势垒。此外,势垒的组成是富Y的和贫Cu的,并且这种偏差随着V / sub acc /的减小而减小。这些趋势与迄今报道的斜坡-边缘型连接的结果十分吻合。

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