8-Bit Asynchronous Wave-Pipelined RSFQ Arithmetic-Logic Unit

摘要

We have designed and demonstrated an Arithmetic-Logic Unit (ALU) based on RSFQ technology as a required step toward building an 8-bit RSFQ processor datapath. The circuit was designed and fabricated with HYPRES' standard 4.5 kA/cm$^{2}$ process. The target clock frequency of the ALU is 20 GHz. In this paper, we present the design and functionality (low-speed) test results of the 8-bit ALU.