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Dynamic degradation of a-InGaZnO thin-film transistors under pulsed gate voltage stress

机译:脉冲栅极电压应力下a-InGaZnO薄膜晶体管的动态退化

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摘要

Instability of amorphous InGaZnO thin-film transistors under pulsed gate voltage (V_g) stress with steep transitions was experimentally investigated. The device threshold voltage (Vth) shifts positively depending on the number of pulse repetitions of the applied V_g pulses. For steeper pulse falling time (t_f), more degradation occurs. In addition, for different base voltages of the V_g pulses, the maximum Vth degradation occurs under the condition that V_g pulses are symmetric about the flat band voltage. Such dynamic degradation is attributed to hot-carrier induced charge injection into the gate insulator and/or trapping at the interface near the source/drain regions during the t_f transients.
机译:实验研究了非晶态InGaZnO薄膜晶体管在陡峭的脉冲栅极电压(V_g)应力下的不稳定性。器件阈值电压(Vth)取决于施加的V_g脉冲的脉冲重复次数正向移动。对于更陡峭的脉冲下降时间(t_f),发生更多的下降。另外,对于V_g脉冲的不同基极电压,在V_g脉冲关于平坦带电压对称的条件下发生最大的Vth劣化。这种动态劣化归因于在t_f瞬变期间热载流子感应的电荷注入到栅极绝缘体中和/或在源极/漏极区域附近的界面处被俘获。

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  • 来源
    《Applied Physics Letters》 |2015年第13期|133506.1-133506.4|共4页
  • 作者单位

    Department of Microelectronics, Soochow University, Suzhou 215006, China;

    Department of Microelectronics, Soochow University, Suzhou 215006, China;

    Department of Microelectronics, Soochow University, Suzhou 215006, China;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
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  • 入库时间 2022-08-18 03:15:07

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