Modeling of Via Interconnect through Pad in Printed Circuit Board

摘要

In this paper the methods of finding inductance L of a cylindrical via and capacitance C due to via pad in printed circuit board (PCB) are described. Initially a thin cylindrical via of diameter d without pad is connected between a 50 ohm copper trace on the top of a dielectric substrate and a ground plane at the bottom. The line is terminated with matched load. The geometrical structure is simulated using Ansoft HFSS software tools to find the input reflection coefficient S-11. The value of inductance of the via is determined in terms of S-11 using transmission line formulation. The theoretical and experimental results for L as a function of d, h, and d/h are compared with those obtained from empirical formulae developed by the other authors. The results are found in good agreement. Secondly a square via pad is added in the trace in absence of via. The equivalent capacitance C of the pad is calculated in the same way from S-11 as it is done for L. Finally, the PCB model is configured with a cylindrical via connected between the pad in the trace and the ground plane. The complex load impedance values are obtained from the electrical equivalent circuit of the L-C combination. This impedance is also determined from the S-11 parameter using HFSS.