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PLL performance comparison with application to spread spectrum clock generator design

机译:PLL性能比较及其在扩频时钟发生器设计中的应用

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This paper presents performance, power and area comparisons of LC vs. Ring VCO-based PLL designs in order to determine the best option for high-speed spread spectrum clock generator (SSCG) designs. Analytical performance, power and area comparisons of LC versus Ring VCO-based PLL designs demonstrate that a Ring VCO can be used to meet the requirements of SATA and SAS applications at rates up to 6 Gbps. The designed SSCG operating frequency range is 2–4.25 GHz with RMS RJ jitter <1.3 and <1.5 pS for non-SSC and SSC modes, respectively, at 3 GHz. The measured EMI reduction is 18 and 21 dB for 2,300 and 4,600 ppm SSC, respectively, also at 3 GHz.
机译:本文介绍了LC与基于Ring VCO的PLL设计的性能,功率和面积比较,以确定高速扩频时钟发生器(SSCG)设计的最佳选择。 LC与基于Ring VCO的PLL设计的分析性能,功率和面积比较表明,Ring VCO可用于以高达6 Gbps的速率满足SATA和SAS应用的要求。设计的SSCG工作频率范围为2–4.25 GHz,对于非SSC和SSC模式,RMS RJ抖动分别为<1.3和<1.5 pS(在3 GHz时)。在3 GHz时,对于2,300和4,600 ppm SSC,测得的EMI降低分别为18和21 dB。

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