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A capacitor-less LDO regulator with dynamic transconductance enhancement technique

机译:具有动态跨导增强技术的无电容LDO稳压器

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A current-efficient, capacitor-less low-dropout regulator (LDO) with fast-transient response for portable applications is presented in this paper. It makes use of an adaptively biased common-gate amplifier to extend loop bandwidth of the LDO at heavy loads. Moreover, a dynamic transconductance enhancement circuit based on capacitive coupling detects rapid voltage spikes at the output, providing an extra large current to charge or discharge the gate capacitance of power transistor momentarily during transient. The proposed circuit has been implemented in a 0.35 µm standard CMOS process. Experimental results show that this fully-integrated LDO can deliver 100 mA load current at 200 mV dropout voltage. It only consumes 15 μA quiescent current and is able to recover within 1 µs under the maximum load current change, with undershoot/overshoot voltages controlled below 250 mV. Loop stability is kept well at light loads (I load = 100 μA) even when a 100 pF output-parasitic capacitor is applied.
机译:本文提出了一种适用于便携式应用的具有快速瞬态响应的电流高效,无电容器的低压差稳压器(LDO)。它利用自适应偏置共栅放大器来扩展重负载下LDO的环路带宽。此外,基于电容耦合的动态跨导增强电路可检测输出端的快速电压尖峰,从而在瞬变期间瞬间提供额外的大电流对功率晶体管的栅极电容进行充电或放电。拟议的电路已在0.35 µm标准CMOS工艺中实现。实验结果表明,这种完全集成的LDO可以在200mV的压差电压下提供100mA的负载电流。它仅消耗15μA静态电流,并且能够在最大负载电流变化下的1μs内恢复,并将下冲/过冲电压控制在250mV以下。即使应用了100pF的输出寄生电容,在轻负载(Iload =100μA)时也能保持良好的环路稳定性。

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