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A Comparison Study on Implementing Optical Flow and Digital Communications on FPGAs and GPUs

机译:在FPGA和GPU上实现光流和数字通信的比较研究

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摘要

FPGA devices have often found use as higher-performance alternatives to programmable processors for implementing computations. Applications successfully implemented on FPGAs typically contain high levels of parallelism and often use simple statically scheduled control and modest arithmetic. Recently introduced computing devices such as coarse-grain reconfigurable arrays, multi-core processors, and graphical processing units promise to significantly change the computational landscape and take advantage of many of the same application characteristics that fit well on FPGAs. One real-time computing task, optical flow, is difficult to apply in robotic vision applications because of its high computational and data rate requirements, and so is a good candidate for implementation on FPGAs and other custom computing architectures. This article reports on a series of experiments mapping a collection of different algorithms onto both an FPGA and a GPU. For two different optical flow algorithms the GPU had better performance, while for a set of digital comm MIMO computations, they had similar performance. In all cases the FPGA implementations required 10x the development time. Finally, a discussion of the two technology's characteristics is given to show they achieve high performance in different ways.
机译:FPGA器件经常被用作可编程处理器的高性能替代方案,以实现计算。在FPGA上成功实现的应用程序通常包含高度的并行性,并且经常使用简单的静态调度控制和适度的算法。最近推出的计算设备(例如,粗粒度可重配置阵列,多核处理器和图形处理单元)有望显着改变计算格局,并利用许多非常适合FPGA的相同应用程序特性。由于其高的计算和数据速率要求,一种实时计算任务(光流)很难应用于机器人视觉应用,因此,它是在FPGA和其他定制计算体系结构上实现的良好候选者。本文报告了一系列将不同算法映射到FPGA和GPU上的实验。对于两种不同的光流算法,GPU具有更好的性能,而对于一组数字通信MIMO计算,它们具有相似的性能。在所有情况下,FPGA实施都需要10倍的开发时间。最后,对这两种技术的特性进行了讨论,以表明它们以不同的方式实现了高性能。

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  • 作者单位

    NSF Center for High Performance Reconfigurable Computing (CHREC), Brigham Young University, 459 CB, Provo, UT 84602;

    NSF Center for High Performance Reconfigurable Computing (CHREC), Department of Electrical and Computer Engineering, Brigham Young University, 459 CB, Provo UT, 84602;

    NSF Center for High Performance Reconfigurable Computing (CHREC), Brigham Young University, 459 CB, Provo, UT 84602;

    NSF Center for High Performance Reconfigurable Computing (CHREC), Brigham Young University, 459 CB, Provo, UT 84602;

    NSF Center for High Performance Reconfigurable Computing (CHREC), Brigham Young University, 459 CB, Provo, UT 84602;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    digital communications; FPGA; GPU; optical flow; reconfigurable computing;

    机译:数字通信;FPGA;GPU;光流可重构计算;

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