一种基于TDC的相对频差测量方法

摘要

A novel method for relative frequency difference detection based on time-to-digital converter( TDC)is proposed. A TDC with a structure of delay chain combined with reference clock is used to directly digitize the frequency difference value of the signal under test. The measurement system and nonlinear calibration module are implemented on field-programmable gate array( FPGA). To evaluate detection precision of frequency difference, oscillator is used as simulation signals to conduct the experiment. Result shows that the proposed measurement method can reach measurement noise 1 ×10-8/ √Hz toΔ?/?. The measurement noise sources are analyzed,on the basis of experimental result.%提出了一种基于时间/数字转换器( TDC)的频率差测量方法.该方法使用延迟链和参考时钟结合的TDC直接数字量化频率差.测量系统与非线性标定模块均在现场可编程门阵列( FPGA)中实现.为了对频率差检测精度进行评估,使用振荡器作为仿真输入信号进行了实验.结果显示:所提出的测量方法对ΔF/F的测量噪声可以达到1 ×10-8/ 槡Hz.在实验结果的基础上,对测量噪声的来源进行了分析.