电气化铁道综合补偿装置功率单元的硬件设计

摘要

Due to the harmonic and reactive power caused by electric locomotive,a simplicified device,composed of a master board and a single power unit, is designed. The architecture of master board is DSP + FPGA. The controller of power unit using a CPLD, instead of lots of logic gate chips. It mainly describes circuit design, selection of electronic component and its parameter settings. Experiment on this device,the result shows that the device has a good compensation characteristic and a certain value of engineering applications.%针对电气化铁道存在的谐波及无功污染问题,设计了一个由主控板配合单个功率单元的小型补偿装置,主控板采用DSP+ FPGA的构架,功率单元控制的逻辑功能采用一片CPLD来实现,从而替代传统采用多个逻辑芯片的设计思路.详细介绍了功率单元主要部分电路的设计、器件的选型及其参数设置.并对该系统进行了实验,结果表明,该装置具有良好的补偿特性且具备一定的工程应用价值.