基于Verilog HDL的PWM脉冲发生器设计

摘要

This paper presents the design of high speed PWM pulse generator , a brief introduction of the pulse generator and a motion controller connection , and based on FPGA hardware platform , provided by Altera Quartus II 11 . 0 version of development tools by Verilog hardware description language and the PWM pulse generator is designed . Finally , through ModelSim simulation , the design meets the requirements .%提出高速 PWM脉冲发生器的设计，简单介绍该脉冲发生器与运动控制器的连接，并基于 FPGA硬件平台，使用 Altera 公司提供的 QuartusII 11.0版本开发工具，采用 Verilog 硬件描述语言，对 PWM 脉冲发生器进行设计。最后，通过ModelSim功能仿真验证，该设计符合要求。