设计了一种基于0．18μm CMOS工艺的高响应度雪崩光电二极管（APD）。该APD采用标准0．18μm CMOS工艺，设计了两个P＋／N 阱型pn节，形成两个雪崩区以产生雪崩倍增电流。雪崩区两侧使用STI（浅沟道隔离）结构形成保护环，有效地抑制了APD的边缘击穿；并且新增加一个深N阱结构，使载流子在扩散到衬底之前被大量吸收，屏蔽了衬底吸收载流子产生的噪声，用以提高器件的响应度。通过理论分析，确定本文所设计的CMOS－APD器件光窗口面积为10μm ×10μm，并得到了器件其他的结构和工艺参数。仿真结果表明：APD工作在480 nm波长的光照时，量子效率达到最高90％以上。在加反向偏压－15 V时，雪崩增益为72，此时响应度可达到2．96 A／W，3 dB带宽为4．8 GHz。%A high responsivity APD based on 0. 1 8 μm complementary metal-oxide-semiconductor (CMOS)process is designed. With the standard 0. 1 8 μm CMOS technology,two P+/N-well type pn junctions are designed to form two avalanche regions in order to produce avalanche multiplication current,and the guard-ring structure is formed with STI (Shallow Trench Isolation)structure on both sides of the avalanche region,which restrains the edge-breakdown effec-tively. A deep N-well structure has been applied in the APD to absorb a large number of carriers before they spread to the substrate,which screened the excessed noise and improved the responsivity of the device. Though theoretical anal-ysis,the optical window area is 1 0 μm ×1 0 μm,other structure and process parameters of the CMOS-APD are also confirmed. The simulation results show that at wavelength of 480 nm,the quantum efficiency reaches up to 90%. The avalanche gain is about 72,the responsivity is 2. 96 A/W and 3 dB bandwidth is about 4. 8 GHz when the bias voltage is -1 5 V.
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