系统级芯片跨时钟域同步技术研究

摘要

随着芯片系统复杂性的提高，系统级芯片中集成了越来越多的模块，这些模块通常工作在不同的时钟频率下，这样芯片上的数据必然频繁地在不同区域之间进行传输。在时钟和数据信号从一个时钟域跨越到另一个时钟域时会发生许多类型的同步问题。采用握手信号进行异步时钟域之间的信号传输，和采用异步FIFO进行总线信号跨时钟域设计可以很好地应用在系统级芯片设计中，保证这些跨越了多个域的时钟和数据信号保持同步。%With the increase of the complexity of the chip system, the system on chip is integrated with more and more modules. These modules work at different clock frequency, so the data of the chip must be transmitted frequently among different domain. When the clock and data signals translate from one clock domain to another, many types of synchronization occur when the clock domain is changed. By using handshake signals to translate data and using asynchronous FIFO to translate bus data among different domain are good ideas in system on chip. These mechanisms ensure the correctness of the data pass, which is cross clock domain signal synchronization.