一种带有亚稳态消除电路的TDC设计方案

摘要

时间间隔测量技术在原子物理、激光测距、定位定时等方面有着重要的应用,因此,高精度的时间数字转换电路TDC(Time-to-Digital Converter)在科学研究和工程实践中扮演着重要的角色;本次提出的TDC设计方案功耗为400μW,工作在512 MHz,实现了250 ps的测量精度和1μs的测量范围,但是TDC在进行时间间隔测量量化时往往受到亚稳态制约.通过加入相位判断逻辑,TDC的积分非线性降低到0.25 LSB,而差分非线性降低到了0.5 LSB,可以完全消除TDC量化时间间隔时遇到的亚稳态问题.%The technology of time interval measurement is of a great importance role in the atomicphysics,laserrang?ing,positioning and timing,and so on. As a result,the high precision Time-to-Digital Converter plays an important role in the scientific research and engineering practice. The power of TDC is 400μW,it works on 512 MHz,and it's measurement resolution is 250 ps,accuracy of measurement is 1μs;However,time interval measurement of TDC is often subject to metastability. Integral nonlinearity of TDC reduce to 0.25 LSB,and Differential nonlinearity reduce to 0.5 LSB by adding a phase judgment logic circuit. We can completely eliminate the metastability when TDC time in?terval.