基于故障对布尔表的模拟电路测试性分析方法

摘要

In order to make full use of the fault response information of testability verification test, and improve the accuracy of testability analysis results, the paper presents a method of testability analysis based on fault-pair Boolean table(FPBT)through physical injection. Firstly,put forward the deficiency of existing testability analysis method. Then,the estimated model of failure detection rate, isolation rate and false alarm rate are discussed based on the fault-pair Boolean table which is established through the measured data. Finally, the algorithm is verified by an example of series voltage regulator circuit. The experimental results show that the FPBT algorithm has higher fault resolution ability compared with D matrix model and integer coded dictionary (ICD) algorithm in testability analysis. Meanwhile, the FPBT algorithm provide a more accurate evaluation index for testability analysis of CUT.%为充分利用测试性验证试验的故障响应特征信息,提高测试性分析结果的准确性,基于故障物理注入技术,提出采用整数对布尔表对模拟电路进行测试性分析的方法.首先分析现有测试性分析方法存在的不足之处;然后根据实测数据构建故障对布尔表,并以此为基础提出预计故障检测率、故障隔离率和故障虚警率等指标的计算公式以及测试性分析步骤;最后结合串联稳压电路实例对文章所提方法进行验证.实验结果表明:与D矩阵模型方法和整数编码字典方法相比,该法都具有更高的故障分辨能力,能够为模拟电路的测试性分析提供更准确的评价指标.