在反辐射导引头接收电路设计中,针对后端信号处理数据量巨大以及模拟前端和数字后端之间连线复杂等问题,提出了一种基于数字下变频(DDC)模块和JESD204B高速串行接口的导引头接收方案.该方案采用模块化设计思想,在导引头模拟前端预先完成多基带信号的数字下变频,降低后端信号处理数据量.采用新一代高速串行JESD204B接口作为模拟前端输出,通过仿真分析JESD204 Phy IP,在Xilinx公司的Kintex-7系列FPGA上完成了JESD204B单链路接收接口.经过仿真和实验,证明所设计接收方案满足反辐射导引头功能要求,并且具备一定的先进性.%In the design of receiving circuit of anti radiation seeker,aiming at the heavy amount of data processing in the back end signal and the complicated connection between analog front end and digital back end,a receiver scheme of seeker based on digital down conversion(DDC) module and JESD204B high speed serial interface is proposed.The scheme adopts modular design idea,and digital down conversion of multi baseband signals is completed in advance in front of the seeker analog front-end,so the amount of data processed at the back of the signal is reduced.Using a new generation of high-speed serial JESD204B interface as analog front-end output,the JESD204B single channel receiver interface has been completed in Xilinx's Kintex-7 series FPGA by means of simulation and analysis JESD204 Phy IP.Through simulation and experiment,it is proved that the designed receiving scheme meets the functional requirements of the anti radiation seeker and has certain advanced characteristics.
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