Modern signal processing techniques for IC inspection and lithographic alignment.

摘要

As the complexity of integrated circuits is increasing rapidly, the need for faster, more reliable and more accurate techniques becomes even more important for maintaining high throughput and high yield in the fabrication process. In this dissertation, we will present applications of modern signal processing techniques to the fields of automatic defect inspection of periodic patterns and lithographic alignment. The inspection and alignment steps have a crucial impact on the yield and throughput of the overall process, regardless of the specific lithographic scheme used (optical, x-ray, etc.).; The algorithms that are currently used for inspection of images with repeating structures require sophisticated hardware or manual scaling to match the periods of their acquired images to their prior period estimates. Our proposed approach assumes no prior knowledge about the repetition periods and uses high resolution spectral estimation techniques to reduce the sensitivity of the inspection process to scaling errors. Potential applications of the proposed algorithm range from wafer and mask inspection of memory chips to problems such as inspection of flat panel displays and CCD arrays.; In general, repeated patterns are shifted from their desired position on a rectangular grid because of thermal effects, flexibility of large substrates, and lithographic imperfections. As feature sizes get smaller, in order to produce a defect-free reference image and locate the defective cells, it becomes necessary to estimate the misalignment of each cell before-hand. The existing distortion in the substrate is estimated by applying recently-developed projection-based ideas that we use to obtain low computational complexity schemes.; We shall also study the application of methods developed for estimating substrate distortion to the problem of lithographic alignment of patterned substrates with low-order distortions. At every step of the lithography process, new mask patterns must be accurately aligned with previous patterns on the wafer surface. While avoiding time-consuming alignment procedures, the techniques proposed in this dissertation will improve the performance of alignment schemes by estimating the process-induced distortion in the substrate.