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High Performance Millimeter Wave Transceiver Circuits for V-Band Applications using Silicon Processes.

机译:使用硅工艺的V波段应用的高性能毫米波收发器电路。

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摘要

Wireless applications are embedded into many electronic products. The lower frequency bands have been allocated with various applications, but this allocation increases the concern of bandwidth congestion. V-band spectrum, from 57 GHz to 64 GHz, has great potential due to its wide available bandwidth. Recent research and commercial products have shown that, the feasibility of wireless systems in the millimeter-wave frequency band improves as technology progresses. However, the required bandwidths are still high for the silicon technology.;Moreover, at millimeter-wave frequencies, many device parasitics are significant. Parasitics neglected at lower frequencies such as gate inductance and resistance may turn into major design disruptions. The intrinsic model that is heavily relied upon often becomes insignificant. Most of the time, designers have to spend tremendous amounts of time on simulation and device modeling to achieve adequate performance for V-band. Another noticeable change for the millimeter-wave circuit is the usage of passive components. The design of microstrip structures to replace traditional lumped components becomes favorable due to the size reduction of microstrip structures at millimeter-wave frequencies.;To demonstrate the design methodology, a few often used transceiver circuit blocks have been designed. These blocks includes the Power Amplifier (PA), which is normally used in the transmitter chain, a Low Noise Amplifier (LNA), the first active circuit on the receiver chain, and a Voltage-Controlled Oscillator (VCO), which is used in both transmitter and receiver chains. The power amplifier was fabricated using 90 nm TSMC CMOS process. It outputs 20 dBm of saturation power and has power gain of 20.6 dBm. The Low Noise Amplifier and Voltage-Controlled Oscillator were fabricated using a 0.13 im IBM BiCMOS SiGe 8HP process. The LNA has simulated gain of 17 dB across the 57 GHz to 64 GHz band and has noise figure of 4.5 dB. The VCO has a simulated phase noise of -111 dBc at 10 MHz of frequency offset of 60 GHz and tuning range from 56 GHz to 65 GHz.
机译:无线应用程序已嵌入许多电子产品中。较低的频带已经分配了各种应用程序,但是这种分配增加了带宽拥塞的担忧。从57 GHz到64 GHz的V波段频谱由于其可用带宽较宽而具有巨大潜力。最近的研究和商业产品表明,随着技术的进步,毫米波频段无线系统的可行性提高了。但是,硅技术所需的带宽仍然很高。此外,在毫米波频率下,许多器件寄生效应都很显着。在较低频率下被忽略的寄生效应,例如栅极电感和电阻,可能会成为主要的设计破坏。严重依赖的内在模型通常变得微不足道。大多数时候,设计人员必须花费大量时间在仿真和设备建模上,才能在V波段上获得足够的性能。毫米波电路的另一个显着变化是无源组件的使用。由于微带结构在毫米波频率下的尺寸减小,因此设计代替传统集总元件的微带结构变得十分有利。为了演示设计方法,设计了一些常用的收发器电路模块。这些模块包括通常在发射器链中使用的功率放大器(PA),低噪声放大器(LNA),接收器链上的第一个有源电路以及在以下情况下使用的压控振荡器(VCO):发送器和接收器链。功率放大器是使用90 nm TSMC CMOS工艺制造的。它输出20 dBm的饱和功率,并具有20.6 dBm的功率增益。低噪声放大器和压控振荡器是使用0.13 im IBM BiCMOS SiGe 8HP工艺制造的。 LNA在57 GHz至64 GHz频带上的模拟增益为17 dB,噪声系数为4.5 dB。 VCO在10 MHz的频率偏移为60 GHz且调谐范围为56 GHz至65 GHz时具有-111 dBc的模拟相位噪声。

著录项

  • 作者

    Law, Chi Yiu.;

  • 作者单位

    University of California, Davis.;

  • 授予单位 University of California, Davis.;
  • 学科 Engineering Electronics and Electrical.;Physics Electricity and Magnetism.
  • 学位 Ph.D.
  • 年度 2011
  • 页码 149 p.
  • 总页数 149
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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