The Role of metal contamination and crystal defects in quarter micron technology

摘要

The past years have witnessed an unprecedented drive to shrink the design rules in IC processing, mainly driven by economic pressures. This has also implied many important process changes, and the requirements for Si wafers have also become tighter. One important yield detractor, device failure through metal impurities and/or crystal defect formation, is strongly affected by these changes. This paper takes a close look at these changes and assesses the risk potential of this failure mechanism. It is concluded that in going from 0.8 #mu#m to 0.25 #mu#m design rules the risk to lose yield and reliability can increase or decrease, depending on the exact circumstances. The better the detailed understanding of critical processes, the more appropriate and the more economical countermeasures can be taken.