首页> 外文会议>Symposium on Interconnects and Contact Metallization for ULSI Oct 17-22, 1999, Honolulu, HI >A NOVEL SPIN-ETCH PLANARIZATION PROCESS FOR DUAL-DAMASCENE COPPER INTERCONNECTS
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A NOVEL SPIN-ETCH PLANARIZATION PROCESS FOR DUAL-DAMASCENE COPPER INTERCONNECTS

机译:双镶嵌铜互连的新型自旋蚀刻平面化工艺

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摘要

A novel processing approach called Spin-Etch Planarization (SEP) is being developed for planarizing dual-damascene copper interconnects. This approach is based on controlled chemical removal of metal films by dispensing a reactive etchant solution on the substrate's surface while it is spinning. The materials being planarized have no mechanical contact with any solid surfaces such as pads or slurry particles, making SEP applicable to polymeric or low-k dielectrics having a lower modulus than dense SiO_2. SEP also has the added benefits of efficient and effective cleaning and dry-in/ dry-out operation. Etch rate and non-uniformity of blanket electroplated and PVD copper on 200 mm substrates has been obtained from a first series of experiments. Etch rates of 14,000 A/min with 3-sigma non-uniformity of 9.2% have been observed with one etching solution reported here. Preliminary results on 200 mm patterned electroplated copper wafers indicate that SEP has an inherent ability to planarize features of sizes 1 μm and below. The removal of copper with the present chemistry is highly selective to typically integrated barrier metals.
机译:正在开发一种称为自旋刻蚀平面化(SEP)的新颖处理方法,以平面化双镶嵌铜互连。此方法基于通过在旋转时在基板表面上分配反应性蚀刻剂溶液来控制化学去除金属膜的方法。被平面化的材料不与任何固体表面(例如垫片或浆液颗粒)机械接触,从而使SEP适用于模量低于致密SiO_2的聚合物或低k电介质。 SEP还具有高效清洁和干入/干出操作的附加优势。从第一批实验中获得了在200毫米基板上的电镀速率和PVD镀覆铜的蚀刻速率和不均匀性。在这里报道的一种蚀刻溶液中,观察到蚀刻速率为14,000 A / min,3-sigma不均匀率为9.2%。在200 mm图案化电镀铜晶片上的初步结果表明,SEP具有使1μm及以下尺寸的特征平坦化的固有能力。用本发明的化学方法去除铜对通常集成的阻挡金属具有高度选择性。

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