VLSI Interconnect Repeater for Sub-threshold Applications: A Novel Approach

摘要

In VLSI, as the complexity of the chip is increasing, length of interconnect and number of repeaters are also increasing. The power delay product and frequency of operation plays significant role in designing of repeater. Simulations and calculations for various lengths of interconnect with the earlier conventional repeater and proposed repeater are performed and analyzed. The simulation results shown in the paper indicates that the proposed repeater circuit operates in medium frequency range with better power-delay product as compared with the previous repeater. Reduction of overall delay, power dissipation as well as operation of the repeater at higher frequencies can lead to the better performance of the VLSI chip in sub-threshold region.