Mixed style of Low Power Multiplexer Design for Arithmetic Architectures using 90nm Technology

摘要

As many researches are concentrating more on arithmetic circuits particularly with Multiplexer (MUX) design as heart of them, this paper also deals with MUX to optimize the power and hence the overall architecture of any greater module may have the considerable reduction in power. The combination of pass transistor (transmission gate) + static method gives a mixed style of MUX which is proposed in this paper and ensures full swing over pass transistor (alone) type of implementation. The circuit swing is an important factor because the use of 2-1 MUXes in a de-composed multiplexer must propagate the data to the output without signal degradation. TSPICE is the circuit simulator tool used and 90nm library is included for simulation. The power analysis and comparison between Complementary Static CMOS, Pass Transistor and the proposed styles will conclude this work is a better approach.