首页> 外文会议>Physics and technology of high-k materials 8 >Atomic-Layer-Deposition HfO_2- Based InP n-channel Metal-Oxide-Semiconductor Field Effect Transistor Using Different Thicknesses of A1_2O_3 as Interfacial Passivation Layer
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Atomic-Layer-Deposition HfO_2- Based InP n-channel Metal-Oxide-Semiconductor Field Effect Transistor Using Different Thicknesses of A1_2O_3 as Interfacial Passivation Layer

机译:使用不同厚度的A1_2O_3作为界面钝化层的基于原子层沉积HfO_2的InP n沟道金属氧化物半导体场效应晶体管

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摘要

High-k dielectrics and III-V substrates have received a great deal of attention in metal-oxide-semiconductor field effect transistors (MOSFETs) applications for they are the promising candidates to meet the everlasting demands for higher performance and less power dissipation in integrated electronics. However, the high density of interfacial states, due to the absence of an ideal native oxide on III-V compound semiconductor like SiO_2 on Si substrate are the major obstacle for realization of high-K on III-V MOSFETs. While there is an extensive effort improving the high-x/III-V interface quality, e.g., molecular beam epitaxial grown Ga_2O_3 (Gd_2O_3)~(1-3) and atomic layer deposited ALD AI2O3, ZrO_2, HfO_2~(4-9) have shown promising results to provide high quality interfaces.
机译:高k电介质和III-V衬底已在金属氧化物半导体场效应晶体管(MOSFET)应用中引起了广泛关注,因为它们是满足对集成电子中更高性能和更低功耗的永恒需求的有前途的候选者。然而,由于在III-V化合物半导体上缺乏理想的天然氧化物(如Si衬底上的SiO_2),界面态的高密度是在III-V MOSFET上实现高K的主要障碍。尽管人们正在努力提高高x / III-V界面质量,例如分子束外延生长的Ga_2O_3(Gd_2O_3)〜(1-3)和原子层沉积的ALD AI2O3,ZrO_2,HfO_2〜(4-9)已经显示出令人鼓舞的结果,可以提供高质量的接口。

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  • 来源
  • 会议地点 Las Vegas NV(US);Las Vegas NV(US)
  • 作者单位

    Department of Electrical and Computer Engineering, Microelectronics Research Center,The University of Texas at Austin, Austin, Texas 78758 USA;

    Department of Electrical and Computer Engineering, Microelectronics Research Center,The University of Texas at Austin, Austin, Texas 78758 USA;

    Department of Electrical and Computer Engineering, Microelectronics Research Center,The University of Texas at Austin, Austin, Texas 78758 USA;

    Department of Electrical and Computer Engineering, Microelectronics Research Center,The University of Texas at Austin, Austin, Texas 78758 USA;

    Department of Electrical and Computer Engineering, Microelectronics Research Center,The University of Texas at Austin, Austin, Texas 78758 USA;

    et al;

  • 会议组织
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 半导体技术;
  • 关键词

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