An algorithm is described for technology mapping of combinationalnlogic into field programmable gate arrays that use lookup table memoriesnto realize combinational functions. It is difficult to map into lookupntables using previous techniques because a single lookup table cannperform a large number of logic functions and prior approaches requireneach function to be instantiated separately in a library. The newnalgorithm, implemented in a program called Chortle, uses the fact that anK-input lookup table can implement any Boolean function ofnK inputs and so does not require a library-based approach.nChortle takes advantage of this complete functionality to evaluate allnpossible decompositions of the input Boolean network nodes. It canndetermine the optimal (in area) mapping for fanout-free trees ofncombinational logic. In comparison with the MIS II technology mapper, onnMCNC-89 LOGIC Synthesis benchmarks Chortle achieves superior results innsignificantly less time
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机译：描述了一种用于将组合逻辑技术映射到使用查找表存储器来实现组合功能的现场可编程门阵列的算法。使用以前的技术很难映射到查找表中，因为单个查找表不能执行大量的逻辑功能，并且现有方法要求每个功能都必须在库中单独实例化。在名为Chortle的程序中实现的newnalgorithm使用了这样的事实，即 K 输入查找表可以实现n K 输入的任何布尔函数，因此不需要使用库- nChortle利用此完整功能来评估输入布尔网络节点的所有可能分解。它可以确定无组合逻辑的无扇出树的最佳（区域内）映射。与MIS II技术映射器相比，onnMCNC-89 LOGIC综合基准测试Chortle取得了优异的结果，时间明显缩短
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