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Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins

机译:具有增强读取和写入电压边距的低漏电9-CN-MOSFET SRAM单元

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A novel static random-access memory (SRAM) cell with nine carbon nanotube MOSFETs (9-CN-MOSFETs) is proposed in this paper. With the new 9-CN-MOSFET SRAM cell, the read data stability is enhanced by 99.09% while providing similar read speed as compared to the conventional six-transistor (6T) SRAM cell in a 16nm carbon nanotube transistor technology. The worst-case write voltage margin is increased by 4.57x with the proposed 9-CN-MOSFET SRAM cell as compared to the conventional 6T SRAM cell. Furthermore, a 1Kibit SRAM array with the new memory cells consumes 34.18% lower leakage power as compared to the memory array with 6T SRAM cells in idle mode.
机译:本文提出了一种具有九个碳纳米管MOSFET(9-CN-MOSFET)的新型静态随机存取存储器(SRAM)单元。 通过新的9-CN-MOSFET SRAM单元,读取数据稳定性在16nm碳纳米管晶体管技术中的传统六晶体管(6T)SRAM单元相比,提供了类似的读取速度。 与传统的6T SRAM单元相比,最坏情况下的写入电压余量增加了4.57倍,提出的9-CN-MOSFET SRAM单元。 此外,与具有怠速模式的6T SRAM单元的存储器阵列相比,具有新存储器单元的1kibit SRAM阵列消耗了34.18%较低的泄漏功率。

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