Design and Layout Challenges in a 2 GHz On-Chip Differential Wide Bandpass Filter

摘要

This paper offers novel insights in the importance of optimal design of the connections between component ground plane and the common reference plane in integrated Silicon circuits while presenting a differential 1.5 ? 2.5 GHz wide bandpass filter design based on lumped elements and manufactured in Global Foundries SiGe 8HP BiCMOS process. Lumped elements are rarely implemented because of their size requirement but are needed to address the linearity performance of the System-on-a-Chip (SoC) of which the differential filter is essential component. Filter test die results show a skew of the 2 GHz center frequency that is associated with how the connection between the PDK inductor ground and the overall internal ground plane that screens out the Silicon substrate is made. EM simulations identified the cause of the skew. A new filter layout yielding the desired frequency response was included in the SoC recently taped out.