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Gate oxide reliability of 4H-SiC V-groove trench MOSFET under various stress conditions

机译:在各种应力​​条件下4H-SiC V沟槽沟沟MOSFET的栅极氧化物可靠性

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The authors reported the optimization of the 4H-SiC V-groove Trench MOSFET (VMOSFET) structure in a previous conference (ISPSD2015). The VMOSFET has the buried p+ regions in the epitaxial layer to protect the trench bottom oxide. In this study, we characterized the long-term gate oxide reliability of the VMOSFETs under various stress conditions such as the gate bias or the drain bias. The VMOSFETs showed the Qbd of 28 Ccm-2 under the constant current stress TDDB measurement at RT. The threshold voltage of the VMOSFETs did not change significantly (|ΔVth|<; 0.12 V) under both the static and the switching gate bias conditions at 175°C for more than 1000 hours. The gate leakage current after the drain bias test did not change for over 6500 hours. In addition, the SCSOA of the VMOSFET was larger than 10 μsec.
机译:作者报告说,优化了先前会议(ISPSD2015)中的4H-SiC V沟槽沟MOSFET(VMOSFET)结构。 VMOSFET在外延层中具有掩埋的P +区,以保护沟槽底部氧化物。在这项研究中,我们在诸如栅极偏置或漏极偏压的各种应力条件下表征了VMOSFET的长期栅极氧化物可靠性。 VMOSFET在室温下在恒流应力TDDB测量下显示QBD为28 CCM-2。 VMOSFET的阈值电压在静态和开关栅极偏压条件下在175℃下的静态和切换栅极偏置条件下没有显着(|ΔVth| <; 0.12 V)超过1000小时。漏极偏置试验后的栅极漏电流在6500小时内没有变化。此外,VMOSFET的SCOA大于10微秒。

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