Technology Computer Aided Design of a Novel Fully Gate Covered Channel Junctionless SOI FinFET for high performance analog application

摘要

This work presents the analysis of various analog performance parameters of a fully gate-covered channel junctionless (JL) SOI FinFET with a high-k dielectric gate oxide, which is compared to the conventional junctionless SOI. The device exhibits an increase in the performance characteristics with respect to the conventional device, in terms of the switching ratio (about 100 times), transconductance (by about 10 times) and parameters like early voltage and intrinsic gain also improved. The devices also show a great reduction of DIBL, by about 60 mV/V and better SCE characteristics. These performance enhancements make the device suitable for certain applications involving high switching speeds and make them a good option for high-performance analog applications.