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Robust and Energy Efficient Non-Volatile Reconfigurable Logic Circuits with Hybrid CMOS-MTJs

机译:具有混合CMOS-MTJ的鲁棒和节能的非易失性可重配置逻辑电路

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Increasing leakage currents with CMOS technology scaling and the volatile nature of SRAM based memory technologies brings in the scope for several emerging nonvolatile memories such as spin transfer torque (STT) MRAMs. Their ability to consume low power, reliability and lower area overhead makes them eligible for a wide range of applications. In this paper, a novel pre charge sense amplifier (PCSA) based nonvolatile AND-LUT has been proposed and compare it's performance with conventional SRAM SA based AND LUT using hybrid 0.18μm CMOS-magnetic tunnel junctions (MTJ) technology. It has been demonstrated that the proposed design exhibits lower total power consumption, reduced latency, near full voltage swings, and lower energy (~21% reduction). This opens door forenergy efficient non-volatile logic circuits such as new FPGA architectures with hybrid CMOS-MTJ technology.
机译:增加具有CMOS技术缩放的漏电流和基于SRAM基础内存技术的挥发性质在诸如旋转转移扭矩(STT)MRAM的几个新出现的非易失性存储器中的范围。它们消耗低功耗,可靠性和下部区域开销的能力使其有资格获得各种应用。本文已经提出了一种新型预充电读出放大器(PCSA)的非易失性和LUT,并使用常规SRAM SA的基于SRAM SA的性能与使用混合0.18μmCMOS-磁隧道连接(MTJ)技术进行比较。已经证明,所提出的设计表现出较低的总功耗,降低延迟,近全电压摇摆,较低的能量(减少〜21%)。这将打开门前进的高效非易失性的非易失性逻辑电路,如具有混合CMOS-MTJ技术的新型FPGA架构。

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