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High Voltage InAlN/GaN HFETs Achieved by Schottky-Contact Technology for Power Applications

机译:通过肖特基接触技术实现高压Inaln / GaN HFET,用于电力应用

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In this paper, a novel approach of Schottky-contact technology for high voltage InAlN/GaN power transistors is demonstrated. The improved breakdown voltage (BV) attributes to the effectively suppressed source carrier injection achieved by the Schottky source metallization featuring excellent metal morphology. Without using field-plate structure and buffer engineering technique, the record three-terminal off-state BV of 650 V is obtained for InAlN/GaN HFET featuring a Schottky source. The corresponding specific on-resistance is as low as 3.4 mΩ·cm~2. Moreover, the proposed Schottky-contact technology enables the removal of conventional alloyed Ohmic contact which is beneficial to device scaling. The BV of 58 V is measured in an InAlN/GaN HFET with L_(GD) of 250 nm, which is the highest BV reported on GaN-based HFETs with such a short drift region. With simple fabrication process as well as the device structure while achieving a significant breakdown voltage enhancement, the proposed technology opens up new perspectives for designing high voltage InAlN/GaN HFET for power applications.
机译:本文证明了一种新的高压Inaln / GaN功率晶体管的肖特基接触技术的新方法。改进的击穿电压(BV)属性通过肖特基源金属化具有优异的金属形态的有效抑制的源载体注射。不使用现场板结构和缓冲工程技术,为肖特基源的Inaln / GaN HFET获得650 V的记录三端子关闭状态BV。相应的特定导通电阻低至3.4mΩ·cm〜2。此外,所提出的肖特基接触技术使得能够去除传统的合金欧姆接触,这有利于器件缩放。用L_(GD)为250nm的Inaln / GaN HFET中测量58 V的BV,其是具有这种短漂移区域的GaN的HFET上的最高BV。通过简单的制造过程以及器件结构在实现显着的击穿电压增强时,所提出的技术开辟了用于为电源应用设计高压Inaln / GaN HFET的新视角。

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