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Fabrication of Ambipolar Gate-All-Around Field-Effect Transistors using Silicon Nanobridge Arrays

机译:使用硅纳米氧化阵阵列制造Ampolar门 - 全场场效应晶体管

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Nanowire bridges have been almost dormant in a nanostructured device community due to the challenges in reproducible growth and device fabrication. In this work, we present simple methods for creating silicon nanobridge arrays with repeatability, and demonstrate integration of gate-all-around field-effect-transistors in the arrays. P-type silicon nanowires air-bridges were synthesized using gold nanoparticles via the VLS technique on the array of predefined silicon electrode-pairs, and then surrounding gates were formed on the suspended air-bridge nanowires. The nanowire air-bridge field-effect-transistors with the surrounding gate exhibited p-type accumulation-mode characteristics with a subthreshold swing of 187 mV/dec and an on/off current ratio of 1.6x10~6 Despite the surrounding gate that helps gate biases govern the channel, off current substantially increased as drain bias increases. This ambipolar current-voltage property was attributable to gate-induced-drain-leakage at the overlap of gate and drain electrodes and trap-assisted tunneling at the nanowire and electrode connection.
机译:由于可重复生长和装置制造的挑战,纳米线桥几乎患者在纳米结构群落中几乎休眠。在这项工作中,我们提出了具有可重复性的硅纳米芯筒阵列的简单方法,并演示了阵列中的栅极 - 全面场效应晶体管的集成。通过在预定义硅电极对阵列上通过VLS技术合成P型硅纳米线空气桥,然后在悬浮空气桥纳米线上形成周围栅极。具有周围栅极的纳米线空气桥场效应晶体管具有187 MV / DEC的亚阈值摆动的P型累积模式特性,尽管周围的栅极有187 MV / DEC的开/关电流比为1.6×10〜6。有助于门偏差管理通道,关闭电流大大增加随着漏极偏差的增加。这种非辅电流 - 电压特性可归因于栅极和漏电极重叠处的栅极感应 - 漏极泄漏,并且在纳米线和电极连接处陷阱辅助隧道。

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