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Conformal Metal Gate Process Technology for 14nm Logic Node and Below

机译:适用于14nm逻辑节点的保形金属栅极工艺技术

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Emerging 3D transistor structures and continued scaling requires conformal metal gate options with low resistivity, band edge work function and improved barrier properties. Doping ALD TiN with Si improves barrier properties shown with 10X reduced gate leakage. Both valence and conduction band edge work function can be met with low resistivity conformal films. The combination of ALD TiN, CVD Co and CVD Al can be used for low resistivity replacement metal gate fill for sub-15nm trenches.
机译:新兴3D晶体管结构和持续缩放需要具有低电阻率,带边缘功函数和改进的屏障性能的保形金属栅极选项。掺杂ALD锡用SI改善了10倍降低的栅极泄漏所示的阻隔性能。可以满足具有低电阻率保形膜的价值和传导边缘功函数。 ALD TIN,CVD CO和CVD AL的组合可用于低电阻率置换金属栅极填充,用于亚15NM沟槽。

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