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Application of 3-D EM Simulation in Research of Integrated Inductors, Package Effects and System in Package Design

机译:3-D EM仿真在包装设计中集成电感,包装效果和系统研究中的应用

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摘要

As the design focus is moving from System-on-Chip (SoC) to System-in-Package (SiP) technology, 3-D package design and 3-D design flow have become two challenging issues in high-frequency designs. In this paper, both issues have been investigated successfully. At first, the accuracy of 3-D EM simulation results was proven by research on integrated inductors. Then a transceiver package design was examined successfully with 3-D EM simulation. For better evaluation of its coupling effects, a simplified equivalent circuit model was extracted from the simulation results allowing a much faster and more accurate circuit simulation. Furthermore, a new SiP design flow integrated with 3-D EM simulation was applied to implement a Low Noise Amplifier (LNA) IC matched with a high-quality inductor on Low Temperature Cofired Ceramic (LTCC) substrate. Compared to its counterpart matched with a SMD inductor on PCB, it demonstrates higher integration and significant performance improvement.
机译:随着设计焦点从片上系统(SOC)移动到系统内(SIP)技术,3-D封装设计和3-D设计流动已成为高频设计中的两个具有挑战性的问题。在本文中,两项问题都已成功调查。首先,通过对集成电感器的研究证明了3-D EM仿真结果的准确性。然后用3-D EM仿真成功检查收发器包装设计。为了更好地评估其耦合效果,从模拟结果中提取了简化的等效电路模型,允许更快更准确的电路模拟。此外,应用了与3-D EM仿真集成的新的SIP设计流程,实现了与低温COFired陶瓷(LTCC)基板上的高质量电感器匹配的低噪声放大器(LNA)IC。与与PCB上的SMD电感相匹配的对应物相比,它展示了更高的集成和显着的性能改进。

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