首页> 外国专利> PACKAGING DESIGN SUPPORTING DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT, PACKAGING DESIGN SUPPORTING METHOD, AND PACKAGING DESIGN SUPPORTING PROGRAM

PACKAGING DESIGN SUPPORTING DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT, PACKAGING DESIGN SUPPORTING METHOD, AND PACKAGING DESIGN SUPPORTING PROGRAM

机译:半导体集成电路的包装设计支持装置,包装设计支持方法和包装设计支持程序

摘要

A logic cell is selected, and the change of the selected logic cell is inputted. Bulk-fixed data with a bulk layer of a semiconductor substrate fixed are generated. After the generation of the bulk-fixed data, an unwired dummy logic cell for design change is arranged in a region where the logic cell is not arranged in the bulk layer. In a region where the dummy logic cell for design change is arranged, the logic cell for design change is generated by wiring the dummy logic cell for design change after bulk fixing. When the change of the selected logic cell is inputted after the generation of the bulk-fixed data, the change of the logic cell is prohibited.
机译:选择逻辑单元,并且输入所选择的逻辑单元的改变。产生具有固定的半导体衬底的体层的体固定数据。在产生大块固定数据之后,在大块层中未布置逻辑单元的区域中布置用于设计改变的未布线的伪逻辑单元。在布置用于设计变更的虚拟逻辑单元的区域中,通过在批量固定之后对用于设计变更的虚拟逻辑单元进行布线来生成用于设计变更的逻辑单元。当在生成大容量固定数据之后输入所选逻辑单元的改变时,禁止逻辑单元的改变。

著录项

  • 公开/公告号WO2009047839A1

    专利类型

  • 公开/公告日2009-04-16

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;ITO NORIYUKI;

    申请/专利号WO2007JP69703

  • 发明设计人 ITO NORIYUKI;

    申请日2007-10-09

  • 分类号G06F17/50;

  • 国家 WO

  • 入库时间 2022-08-21 19:19:26

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