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PACKAGING DESIGN SUPPORTING DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT, PACKAGING DESIGN SUPPORTING METHOD, AND PACKAGING DESIGN SUPPORTING PROGRAM
PACKAGING DESIGN SUPPORTING DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT, PACKAGING DESIGN SUPPORTING METHOD, AND PACKAGING DESIGN SUPPORTING PROGRAM
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机译:半导体集成电路的包装设计支持装置,包装设计支持方法和包装设计支持程序
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摘要
A logic cell is selected, and the change of the selected logic cell is inputted. Bulk-fixed data with a bulk layer of a semiconductor substrate fixed are generated. After the generation of the bulk-fixed data, an unwired dummy logic cell for design change is arranged in a region where the logic cell is not arranged in the bulk layer. In a region where the dummy logic cell for design change is arranged, the logic cell for design change is generated by wiring the dummy logic cell for design change after bulk fixing. When the change of the selected logic cell is inputted after the generation of the bulk-fixed data, the change of the logic cell is prohibited.
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