High-Voltage IC Technology: Implemented in a Standard Submicron CMOS Process

摘要

This paper describes a high-voltage IC technology. Various novel lateral high-voltage device concepts, which can be efficiently implemented in a submicron CMOS process,are explained and analyzed. It's essential for lateral high-voltage devices to show best trade-offbetween specific on-resistance R_(sp)and breakdown voltage BV, super-junction devices givean opportunity to achieve a best R_(sp)-BV trade-off for over 100V. Key issues monolithicintegration of high-voltage devices and low-voltage CMOS are reviewed in the paper. Finally,hot-carrier (HC) behaviour of a high-voltage 0.35μm lateral DMOS transistor (LDMOSFET) ispresented. It is shown that self-heating effects during HC stress have to be taken into accountfor the HC stress analysis. Together with TCAD simulations and measurements, one can clearlyexplain the self-heating effects on the HC behaviour of an LDMOSFET.