As higher and higher pin-count semiconductor packages are deployed in telecommunications and data processing applications, Printed Circuit Board (PCB) substrates must evolve to allow increased routing densities. To be capable of meeting these routing density and complexity needs, higher layer counts must be combined with filled microvias. High Density Interconnect (HDI) product of this type places significant new demands on the metallization processes, in particular, copper electroplating. To meet these needs, seemingly incompatible objectives must be met. Thinner and more uniform surface copper deposits have to be produced, increasingly difficult microvia geometries must be filled, through-hole throwing power delivered, while maintaining plating rates capable of delivering production throughputs. These demands often exceed the capability of current commercial copper electroplating processes. This paper describes a new pattern-plate, Direct Current (DC) copper electroplating process designed for HDI and packaging substrate applications. Microvia filling performance, plated through hole throwing power, surface distribution / trace profile and product reliability data, as a function of a variety of processing variables is discussed.
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