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Package Size Reduction Solder Joint Reliability for High Density Semiconductor Packaging

机译:封装尺寸减小和焊接接头可靠性高密度半导体包装

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Semiconductor packaging development for high volume consumer products poses many unique challenges across several technical disciplines in order to deliver the performance, cost, and reliability targets demanded in today's markets. In this paper, we will focus on the challenges around implementing compact Plastic Ball Grid Array (PBGA) package solutions for semiconductor devices considering the interdependencies of printed circuit motherboard technology, motherboard assembly processes, and reliability requirements for the mobile personal computer market segment. The focus will be on interconnect density, package size and product requirements and strategies for balancing each of these considerations. The discussion includes an examination of the trade offs around various strategies for package size reduction and how they apply to different markets.
机译:高批量消费产品的半导体封装开发在几个技术学科上造成了许多独特的挑战,以提供当今市场所需的性能,成本和可靠性目标。在本文中,考虑到印刷电路主板技术,主板组装工艺和移动个人计算机市场段的可靠性要求,我们将重点关注实施紧凑型塑料球网格阵列(PBGA)封装解决方案的挑战。重点将在互连密度,包装尺寸和产品要求和平衡这些考虑中的策略上。讨论包括审查各种战略的贸易问题,以减少各种策略以及它们如何适用于不同的市场。

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