The migration to lead free reflow is bringing many challenges for the PCB industry. High Tg laminates, stability of materials thru 2X reflows, rework, moisture sensitivity etc. This requires careful evaluation of new laminate materials, balancing component layout and optimization of reflow profiles to minimize damage to PWBs. This is critical for thin PWBs (less than 0.1 mm) boards used in cell phones and other portable products that use build up microvia technologies.The trends of increased functionality and reduced size of portable wireless products, such as handsets; PDAs are demanding increased routing densities for printed circuit boards. The handheld wireless product market place demands products that are small, thin, low-cost and lightweight and improved user interfaces. In addition, the convergence of handheld wireless phones with palmtop computers and Internet appliances is accelerating the need for functional circuits designed with smallest, low-cost technology. Historically, the industry has met this challenge through high density interconnect technology and increased silicon integration and component miniaturization. Microvia high density interconnect (HDI) also known as build up technology, is one method for constructing circuit boards with high routing density demands. [1].For HDI board, vias can be formed using unreinforced dielectric such as Resin Coated Foil (RCF), using processing techniques such as laser drilling or photoimaging. The vias are then metallized using electroless copper/electrolytic plating. The advantage of the HDI construction is the ability to create smaller vias (6 mils) and via pad sizes. This enables higher routing density, lower metal count, reduced board area and increased functionality as compared to conventional boards. HDI improves the wiring density by using build up microvias in the outer layers. However there is still dead space where components cannot be mounted and lines cannot be wired, because of staggered via hole structure. On the other hand, ALIVH-G (Any Layer Interstitial via Hole) needs no through hole. This is because any two layers are electrically connected by IVH (Interstitial Via Hole). The IVH can be placed in any position. Since mere is no through hole that disturbs interconnections between components, the dead space becomes reduced and the wiring capability is improved greatly. [2] Past board technologies used stacked microvias on the outer layers. Current board designs use ALIVH-G technology. These vias are laser drilled and the interconnection technology used is conductive copper paste. The typical design rule is Lines/Space 100/100 micron and Via/Land is 200/400 microns. ALIVH-G technology makes a lightweight substrate (less than 100g) The paper presents the evaluation conducted to ensure the stability of the laminate and microvias through the double-sided lead free reflow process. This was evaluated as a part of the phone product qualification.
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