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Lifetime of solder joint and delamination in flip chip assemblies

机译:焊接芯片组件中的焊接接头和分层的寿命

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The effects of underfill on thermomechanical behaviors of two types (B and D) of flip chip packages, with different bumping size and stand-off height were investigated under thermal cycling by both experiments and finite element simulation. The results show that the use of underfill encapsulant increases tremendously (/spl sim/20 times) the thermal fatigue lifetime of SnPb solder joint, and weakens the effects of stand-off height on the reliability, and changes the deformation mode of the package. It was found that the thermal fatigue crack occurs in the region with a maximum plastic strain range, and the Coffin-Manson type equation could then be used for both packages with and without underfill. The effects of material models of underfill, i.e. constant elasticity (EC) and temperature dependent elasticity (ET) as well as the viscoelasticity (VE), on the thermomechanical behaviors of flip chip package were also studied in the simulation. The VE model gives comparatively large plastic strain range, and big displacements in shear direction, as well as sequentially low lifetime of solder joints. The ET model gives the close results to VE model and could be used instead of VE in simulations for the purpose of simplicity. Underfill delamination analysis of flip chip on low-cost board is also presented. The delamination propagation rates at the interface between chip and underfill have been measured by using C-SAM inspection of flip chip assemblies under thermal cycle loading. The experimental measurement was done in four cases, that were type B with fine solder joint and fractured solder joint, and type D with fine and fractured solder joint. In the finite element simulations the strain energy release rates G and the phase angles /spl phi/ near the delamination crack tip were calculated for four measurement cases by employing the fracture mechanical method. The Paris half-empirical equations were determined from the delamination propagation rates measured and the energy release rates simulated. Meanwhile, the energy release rates G with a different delamination crack length were also simulated. The G /spl sim/ a curve representing a convex shape when the crack propagates and indicates that the delamination crack may be stable. After propagating for a certain length the crack will be arrested in the flip chip assembly.
机译:通过实验和有限元模拟,在热循环下研究了倒装芯片封装两种类型(B和D)两种类型(B和D)的热机械行为的影响,并通过实验和有限元模拟来研究热循环。结果表明,使用底部填充密封剂的使用巨大(/ SPL SIM / 20次)SNPB焊点的热疲劳寿命,并削弱了脱扣高度对可靠性的影响,并改变了包装的变形模式。发现热疲劳裂缝发生在具有最大塑料应变范围的区域中,然后可以将棺材 - 曼森型式等式用于两种包装,无底部填充。还研究了底部填充物的效果,即恒定弹性(EC)和温度依赖性弹性(ET)以及粘接芯片封装的热机械行为的效果以及粘弹性(ET)。 VE模型提供相对大的塑料应变范围,剪切方向的大位移,以及焊点的续光寿命。 ET模型使VE模型的关闭结果使得可以在模拟中使用而不是VE,以便简单起见。还提出了低成本板上倒装芯片的填充分层分析。通过在热循环负载下使用倒装芯片组件的C-SAM检查来测量芯片和底部填充之间的接口处的分层传播速率。实验测量在四种情况下进行,即B型,具有精细焊点和裂缝焊点,以及具有精细和断裂焊点的D型。在有限元模拟中,通过采用裂缝机械方法计算菌株能量释放速率G和相位角/ SPL PHI /靠近分层裂纹尖端。从测量的分层传播速率和模拟能量释放速率确定巴黎半经验方程。同时,还模拟了具有不同分层裂缝长度的能量释放速率G。当裂缝传播时表示凸形的G / SPL SIM /曲线表示并表明分层裂纹可能是稳定的。在传播一定长度之后,裂缝将在倒装芯片组件中被捕。

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