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Effects of Miscut Substrates on Electrical Conductivity Across InP and GaAs Wafer-Bonded Structures

机译:误生基材对INP和GaAs晶片粘结结构电导率的影响

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Wafer bonding of GaAs and InP using an (NH_4)_2S treatment are investigated for the effect of the wafer off cut angle on the electrical conductivity of wafer-bonded III-V interfaces. HRTEM and STEM are used to confirm the misorientation of the bonded samples and to compare the interface morphology across the range of relative misorientations. A line ratio at the interface shows that the well-bonded crystalline regions to amorphous oxide inclusions is consistent across all bonded samples, indicating that the degree of misorientation does not affect the level of interface recrystallization at high temperatures. Fitting the zero-bias conductance over a range of temperatures reveals an increase in barrier heights for samples with greater than 4° misoriented bonded pairs. This demonstrates that the out-of-plane relative surface misorientation is a critical parameter to be monitored and thus any in-plane twist as well in order to achieve superior electrical conductivity in direct-bonded multijunction solar applications.
机译:研究GaAs和InP使用(NH_4)_2S处理的晶片键合用于晶片关闭角度对晶片键合III-V界面的电导率的影响。 HRTEM和茎用于确认键合样品的错误化,并在相对错误范围内比较界面形态。界面处的线比表明,在所有粘结的样品中,粘结的结晶区域与无定形氧化物夹杂物一致,表明,错误程度不会影响高温下的界面重结晶水平。拟合在一系列温度范围内的零偏置电导显示出具有大于4°的样品的屏障高度增加,其有错位的粘合对。这表明外平面的相对表面无主值是要监测的关键参数,从而进行任何面内捻,以便在直接粘合的多结太阳能应用中实现优异的导电性。

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