Innovative 3D Structures Utilizing Wafer Level Fan-Out Technology

摘要

During the past few years, Wafer Level Fan-Out (WLFO) has emerged as one of the leading advanced packaging technologies for the electronics industry, providing the opportunity for increased I/O density, reduced package footprint, improved electrical/mechanical performance, and reduced cost. WLFO is now well-established as a viable alternative to conventional laminate-based and wafer-based packages. More recently, WLFO has shown its ability to extend itself into more innovative and advanced structures to support the increased functionality and performance requirements of next generation mobile and networking devices. By applying enabling technologies, such as Thru-Mold Via (TMV) Fine Pitch Copper Pillar (FP CuP) bumping, and Chip-on-Chip (CoC) bonding, WLFO extends its applications and benefits to the area of 3D Packaging. Two such structures are 3D PoP (Package-on-Package) WLFO and Face-to-Face (F2F) WLFO. Positive development and qualification results indicate that WLFO has the ability to extend itself beyond simple 2D structures to meet the needs of more advanced applications and device technologies.