Onboard autonomous management system of SPARK Earth observation microsatellites

摘要

Space remote sensing has played a key role in numerous fields, such as resource exploration, disaster prevention, and environmental protection. Many countries have been attracted to research the Earth observation microsatellite because of its short development period, low cost, and high return. With the increasing number of in-orbit satellites, however, traditional ground management way (TT&C) has caused a heavy workload, and is error-prone and time-consuming. That makes increasingly urgent demand for the onboard autonomous management ability of satellites. As the onboard resources of microsatellites are extremely limited, the implementation of onboard autonomous management is especially difficult. This paper addresses an onboard autonomous management system for Earth observation microsatellites with double processors. A concurrent CAN bus architecture is designed to avoid affecting original onboard systems. As a node on the CAN bus, the autonomous management system (AMS) runs independently on a single FPGA with extra SRAMs. By transmitting, receiving, and listening, the AMS can communicate with original housekeeping system and other subsystems. For Earth observation microsatellites, the AMS mainly focuses on the autonomous generation of command sequences of observation and data transmission tasks. To satisfy multiple complex constraints and low computational cost, a new dynamic value based heuristic planning (DVHP) method is proposed for the multi-area-target observation of microsatellites. Additionally, an efficient rotational-path decomposition based recursive planning (RDRP) method is adopted for the attitude reorientation under bounded and pointing constraints. The AMS has been successfully applied in two SPARK microsatellites launched on 22 December, 2016, which were developed by the Shanghai Engineering Center for Microsatellites. Microsatellite experiment results demonstrate that under very limited onboard computing resources (32MHz processor, 2MB RAM), the