Deposition of Al/Ti/NiV/Ag for Backside Metalisation on thinned 200 mm wafers using a Sigma fxP sputtering system

摘要

In power MOS applications, the on state resistance, R_(DS-ON), of the device is an important parameter and can be reduced by reducing the thickness of the substrate prior to the drain metalisation. Newer generations of power MOS are requiring thinner and thinner wafers to drive down this resistance, typically as thin as 100 μm for 150mm and 175 μm for 200mm wafers. However, traditional methods of backside metalisation typically use thermally evaporated sources and have inherent problems with the manual handling of thinned wafers. Recent attention has focussed on the use of cluster tools to reduce the level of manual wafer transfer but even this is not without its own set of inherent problems, especially relating to changes in wafer bow during processing.