A simple wrapped core linking module for SoC test access

摘要

For a System-on-a-Chip(SoC) comprised of multiple IP cores, various design techniques have been proposed to provide diverse test link configurations. In this paper, we introduce a simple flag based Wrapped Core Linking Module(WCLM) that enables systematic integration of IEEE 1149.1 TAP'd cores and P1500 wrapped cores. Compared with other state-of-art techniques, our technique requires no modification on each core with less area, and provides more diverse link configurations.