Novel assessment of process control monitor in advanced semiconductor manufacturing: a complete set of addressable failure site test structures (AFS-TS)

摘要

This work describes the implementation of a novel assessment of process control monitor in advanced semiconductor manufacturing. It manifests the design and simulation results of addressable failure site test structures. Four novel test structures -with three level interconnects have been developed and validated with in-house simulation system. The novel test structures are used to identify the locations of killer defects. A test chip of 22×6.6 mm{sup}2 containing four types test structures wasimplemented using 0.25μm logic backend of line process. This simple and efficient test structure for killer defect identification demonstrated its superiority in yield enhancement.