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High Capacitance Density Multilayer Integrated Tantalum Pentoxide Decoupling Capacitors

机译:高电容密度多层集成钽五氧化钽去耦电容器

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The process development and analysis of a multilayered thin film integrated capacitor is presented. Thin film integrated capacitors show great promise as IC power supply decoupling capacitors. Their low intrinsic inductance allows them to deliver fast transient, high current to the IC. However, presently thin film capacitors have been limited in capacitance due to the limitation of substrate area in boards or packages. Generally, there is not enough area available to produce the capacitance needed so that integrated capacitors can completely replace discrete components. In this paper a multilayer thin film integrated capacitor will be discussed. The details of the multilayer process will be described, as well as process challenges and detailed results of the research. Discussion and results of two and three layer stacked integrated capacitors will be presented. As expected these devices can double or triple the capacitance density of single layer designs.
机译:提出了多层薄膜集成电容的过程开发和分析。薄膜集成电容器显示为IC电源去耦电容的良好承诺。它们的低固有电感允许它们为IC提供快速的瞬态,高电流。然而,由于衬底区域的基板区域的限制,目前薄膜电容器受电容的限制。通常,没有足够的区域可以产生所需的电容,使得集成电容器可以完全更换离散组件。在本文中,将讨论多层薄膜集成电容。将描述多层过程的细节,以及过程挑战和研究的详细结果。将介绍两个和三层堆叠集成电容的讨论和结果。正如预期的那样,这些设备可以双层设计的电容密度加倍或三倍。

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