Gap-Fill Technology with High Aspect Ratio Process for 45nm CMOS and beyond

摘要

In the present work the High Aspect Ratio Process (HARP) using a new O{sub}3/TEOS based sub atmospheric chemical vapor deposition process was implemented as STI gapfill in sub-65nm CMOS. We prove good gapfill performance up to aspect ratios larger 10:1. Since this fill process doesn't attack the STI liners as compared to HDP, a variety of different STI liners can be implemented.