Overlay errors in optical lithography

摘要

The overlay errors in IC manufacturing must be less than one-third of the minimum linewidth for higher density devices. It is a very important and difficult problem to keep high overlay accuracy. In this paper, a simulation model was made to analyze the overlay distribution geometry and the statistical characteristics. It explores the effects of various parameters of intrafield sources and interfield sources on the overlay. The emphasis is placed on analysis of the physical significance of various parameters.