This paper discusses dielectric breakdown as a major cause for failure of ICs with less than a half-micron linewidth. Focusing on DRAMs the characterization of dielectric reliability using different types of properly designed test structures and appropriate stress methods is reviewed. Considerations concerning screens and upper limits for stress conditions are presented. With a step stress, the sample size can be reduced and efficiently used to cover the specified lifetime. To understand and identify relevant failure mechanisms, physical failure analysis of representative fails is required.
展开▼
