Threshold voltage degradation in plasma damaged cmos transistors - role of electron and hole traps related to charging damage

摘要

The paper presents results of study of threshold voltage (VT) degradation in CMOS transistors damaged by high-field charging. Fowler-Nordheim stress induced VT degradation in devices with latent charging damage due to plasma processing was found to be strongly dependent on device type and diagnostic stress conditions. "Direct" and "reverse" antenna effect for NMOS, and anomalous behavior of PMOS devices are explained with polarity dependent trapping and the model includes generation of hole traps, an effect not considered previously.